1. Field of the Invention
This invention relates to a method of dry etching an organic SOG film used as an interlayer dielectric having low-K (low dielectric constant), which is suitable for use in manufacture of a semiconductor integrated circuit device.
2. Description of the Related Art
With high integration of a semiconductor device centering around recent system and logic LSIs, widths and intervals of metal wires or interconnections have been so narrowed, and interconnections themselves are also becoming so long in length. As a result, the resistance of each interconnection and the capacitance between adjacent interconnections are on the increase, and increases in wiring delay and power consumption due to these have become innegligible. As a method of lessening the influence exerted on device performance with such high integration, there has been proposed a method of introducing a low resistance material such as copper (Cu) as an alternative to the conventionally-used aluminum (Al) wiring material and bringing an insulating film provided between adjacent interconnections into low-K. A study thereof intended for practical use has been promoted.
As to the degree of contribution of a critical path for determining an operating speed (operating frequency) of a device in particular to a delay time, wiring capacitance rather than wiring resistance is expected to increase from the result of simulation. Further, if the wiring capacitance is lowered by a low-K film rather than a reduction in wiring resistance by a Cu interconnection, then the resultant performance is expected to increase by far. A study of an FSG film formed by adding fluorine to an SiO2 film by the conventional chemical vapor deposition (CVD) method, an organic SOG (Spin On Glass) film, an organic film, a porous film, etc. has been carried out actively.
FIG. 1 shows one example of a step in which an organic SOG film formed as a low-K film is used as an interlayer dielectric. In FIG. 1A, a plasma TEOS (Tetraethoxy Silane) oxide film is formed over a lower layer metal interconnection 2 formed over a silicon substrate 1, as a lower layer oxide film 3, followed by deposition of an organic SOG film 4. As an SOG material, may be used, for example, one obtained by dissolving a low-K material composed of an oxide film (SiO2)added with an alkyl group in an organic solvent.
Next, the surface of the organic SOG film is modified by an oxygen O2 plasma treatment. Thereafter, a plasma TEOS oxide film used as a capping oxide film 5 is deposited over the organic SOG film 4. The capping oxide film 5 is used to avoid a problem on peeling of a resist in a photolithography process at the subsequent formation of each via hole. Further, the capping oxide film 5 also acts as a cover film for chemical mechanical polishing (CMP) upon forming interconnections to be embedded into the via hole. The formation of the surface modified layer by the O2 plasma is carried out to prevent film peeling developed between the capping film and the organic SOG film upon execution of the CMP.
Referring next to FIG. 1B, via hole 7 for bringing an upper layer metal interconnection 9 and a lower layer metal interconnection 2 into conduction are formed by using the normal photolithography and dry etching technology. The resultant one is processed under a pressure of a few Pa through the use of a mixed gas of CHF3, CF4 and Ar employed as a general etching condition for an SiO2 film by using, for example, parallel plate reactive ion etching (RIE) equipment as a condition for dry etching. Referring to FIG. 1C subsequently, tungsten plugs 8 each corresponding to a via hole embedding interconnection are formed and thereafter the upper layer interconnection 9 is formed.
However, problems shown below arise when the low-K film such as the aforementioned organic SOG film is introduced into the device. The first problem is that an etch rate at the via hole etching is very slow. The organic SOG film can normally be etched by using a gas plasma for etching the SiO2 film. The organic SOG film is etched by plasma radiation under a pressure of about 1.5 Pa through the use of the CH3/CF4/Ar mixed gas by, for example, the parallel plate RIE equipment as described above.
However, if the etch rate of the organic SOG film is compared with that of, for example, a thermally-grown SiO2 film, then the value thereof is very slow as in the order of {fraction (1/4+L )}. As the device is highly integrated and an aspect ratio (hole depth/hole size) of each via hole increases, such an influence becomes pronounced, so that there may be cases in which a photoresist used as a mask material is not held up due to an increase in etching time in particular. 
The second problem is a problem produced in a post-step subsequent to via hole etching. This is principally classified roughly into (a) a problem on a change in the quality of a film upon O2 plasma treatment and (b) a problem on reaction between a WF6 gas and an organic SOG film upon formation of buried tungsten (W). The problem (a) will first be explained. In general, the above-described organic film has the property of becoming weak to heat treatment or annealing in an oxygen plasma atmosphere, and a change (changing into SiO2 form due to densification) in the quality of a film occurs upon O2 plasma treatment for removing the photoresist subsequent to via hole processing.
This is considered to occur due to the fact that an oxygen radical (O*) in a plasma enters into a film from a pattern side-wall of an organic SOG film upon O2 plasma treatment and thereby reacts with an alkyl group (CH3 or the like) in the film under a high temperature. Since a hydrophilic Sixe2x80x94OH group and Sixe2x80x94H group are created in the film by this reaction, it absorbs large quantities of water when subsequently exposed to the air.
Upon introduction of the film into the device, such change in the quality of the film raises problems such as (i) an increase in dielectric constant, (ii) a decrease in film thickness due to degeneration of the film, and (iii) desorption of a large quantity of gases (principally atmospheric components such as H2O, etc.), a failure in embedding due to the desorption, a reduction in yield, etc. upon embedding of (W) into each via hole.
A description will next be made of the problem (b). In order to form a buried W layer after the formation of each via hole, a nitride (TiN) contact layer is normally formed in each hole by a sputtering method and thereafter a W film is deposited thereon by a chemical vapor deposition (CVD) method. The TiN also serves as a protective layer for preventing reaction between WF6 used as a deposition gas upon W burying and an organic SOG side-wall.
As, however, miniaturization or scale-down of a wiring width has progressed with high integration of LSI, a fundamental design rule for allowing each via hole called borderless interconnection to be formed with being deviated from over a bedding interconnection has come into use. In such borderless interconnections, a fine slit is formed between a side-wall of a bedding wiring pattern and a side-wall of each off-defined via hole, so that TiN is not sufficiently buried in the fine slit.
As a result, TiN does not act as the side-wall protective layer, and the WF6 and organic SOG side-wall vigorously react directly with each other upon the subsequent W embedding, thus causing corrosion and W peeling. As a method of solving the problems (a) and (b) referred to above, an approach for performing plasma treatment with an oxygen ion (O+) as a main part after the formation of each via hole is considered.
This is a method of preferentially bombarding a pattern side-wall with the oxygen ion (O+) upon O2 plasma treatment and densifying only an extremely surface layer of the side-wall (making a reform into SiO2), thereby inhibiting the entering of an oxygen radical into a film upon O2 plasma treatment. Since the side-wall modified layer also acts as a protective film for inhibiting reaction between the WF6 gas and organic SOG side-wall upon the subsequent formation of a buried W wiring layer, the corrosion and W peeling are prevented from occurring even if the TiN contact layer is not deposited within the aforementioned fine slit.
However, a problem arise in that when the shape of each pattern is bowed and a metal sputtering material extending from a bed is attached to a side-wall before the O2 plasma treatment (upon via hole etching), the subsequent formation of the side-wall modified layer by the O+ ion impact is made non-uniform so that a sufficient inhibition effect cannot be obtained. When bombarding energy for simply forming the modified layer is applied to the side-wall, a reaction between the O+ ion and the pattern side-wall proceeds to thereby newly bring each via hole into bowing form. Further, another problem arises in that the via hole changes in form due to O+ ion-based sputtering.
A first invention is constructed so that when each contact hole is formed in an insulating film composed of an organic SOG film by a mixed gas containing at least C4F8 and O2, the quantity of flow or flow rate of O2 at dry etching is set to 50% or less of the quantity of flow of C4F8+O2. As a result, a problem on the speeding up of an etch rate of the organic SOG film and the verticality of the shape, both of which are held in a trade-off relationship to each other, can be solved.
A second invention is constructed so that when each contact hole is formed in an insulating film composed of an organic SOG film by a mixed gas containing at least CF4, CHF3 and N2, the quantity of flow of N2 at dry etching is set to above 10% and below 80% of the total quantity of flow of CF4+CHF3+N2. As a result, the contact hole excellent in shape can be realized.
A third invention is constructed such that each contact hole is defined in an insulating film composed of an organic SOG film by a resist pattern, and plasma treatment for removing the resist pattern subsequent to the formation of the contact hole utilizes a mixed gas of O2+N2H2 or O2+N2+H2. Thus, a problem that an oxygen radical enters into a film from a pattern side-wall to thereby cause changes in film quality and shape, can be solved.
Typical ones of various inventions of the present application have been shown in brief. However, the various inventions of the present application and specific configurations of these inventions will be understood from the following description.